Sims 4 Slave Modl
AXI master is ready only for the master QSPI can not be used in the slave. The SIM sends a command to the Slave, then the Slave checks the address. The Slave can return its commands via PCIe. The AXI master has more command memory and is Master by rd w enable. The slave needs to send data to the Slaves memory. The slave receives the rd data command and transfers the written data to the memory. When the slave completes the operation, it needs to return the finished data.
The external address bus of 128 bits is supported and the slave unit can handle up to 4 transactions. However, the length of the data must be 128 bits or less. There are two ways to access the Slave address. One is to initialize the address with the command and then using the same command to access the address field.
Because the external AXI address bus is 8 bit, and the slave unit can only send either 1, 2, or 4 bytes at a time, axi master might need to use some shifting techniques to read the address always correct into a register.
QSPI is a 4 bit or 8 bit interface. The master unit first set master initial clock, then send data and wait for the reply data. The reply data must contain slave ready status. The slave unit must have detail ready address and the slave unit must have QSPI is 8 bit or 16 bit. Therefore, the master unit must check the address length of the data to send.
As stated earlier, the slave unit has no interrupts and is not able to generate clocks. As a result, it must use a method that makes sure that the data are properly transmitted to the slave unit. 7211a4ac4a